Sentinel
A cryptographic-compute direction for post-quantum key operations, zero-knowledge proofs, secure consensus, and protected infrastructure.
Semiconductors
Zhilicon
The silicon your mission depends on.
Research thesis
One architecture. Every mission.
Zhilicon is developing fusion-specific integrated circuits on a common RISC V foundation for artificial intelligence, cryptography, molecular simulation, RF intelligence, and compute in extreme environments.
The programme defines an architecture and a set of intended design directions. Performance, process, interfaces, power, packaging, schedule, qualification, and availability remain subject to engineering validation.
05Compute programmes
Sentinel, Discovery, Horizon, Nexus, and Prometheus
01Common foundation
RISC V control with workload-specific extensions
04Mission domains
Defense, life sciences, fintech, and sovereign systems
03Fusion SDK functions
Compile, orchestrate, and profile
The compute constraint
Critical workloads do not share one compute pattern.
Cryptography, molecular simulation, RF processing, resilient control, and artificial intelligence place different demands on execution, memory, data movement, timing, and trust.
The architecture does not treat those workloads as interchangeable. Post-quantum cryptography and proof systems need controlled arithmetic and key paths. Molecular workloads depend on repeated interaction calculations and scientific data movement. RF systems combine signal processing with rapid local decisions. Extreme environments require fault-aware control, while artificial intelligence depends on tensor, vector, and memory coordination.
Zhilicon's design premise is to place each workload-specific engine inside a common RISC V system rather than describe one general-purpose processor as equally suited to every mission.
Five programmes
Five missions. One RISC V foundation.
Each programme gives the common architecture a different set of domain engines, data paths, and system responsibilities.
Discovery
A scientific-compute direction for molecular dynamics, computational chemistry, genomics, protein analysis, and high-throughput virtual screening.
Horizon
A fault-tolerant RISC V direction for onboard intelligence, deterministic control, and protected computing in space, aviation, defense, and extreme environments.
Nexus
A heterogeneous RF and AI chiplet direction for communications, adaptive beamforming, signal intelligence, and sovereign network infrastructure.
Prometheus
An artificial-intelligence compute direction for transformer inference, mixed-precision training, sparse and dense tensor work, vector processing, and scientific workloads.
Fusion computing
A coherent foundation connects control, acceleration, and trust.
The proposed system combines a common control architecture with workload-specific engines and trusted system functions.
RISC V control complex
Custom RISC V cores provide the common control plane across the five programme directions.
Workload-specific extensions
Instruction-set extensions and domain engines are intended to move persistent workload operations closer to the silicon path that executes them.
Fusion engines
Artificial intelligence, cryptography, and quantum-control functions are presented as coordinated system elements rather than unrelated peripherals.
Shared memory
The architecture direction uses a shared memory foundation to coordinate control state, domain data, and accelerator work.
Coherent network on chip
A coherent on-chip network is intended to connect cores, memory, trusted functions, and mission-specific accelerators.
Hardware trust
Secure boot, physically unclonable function keys, and a hardware root of trust form part of the stated architecture direction.
Fusion SDK
One planned toolchain across every FSIC.
The early-access roadmap defines an LLVM-based software stack spanning the portfolio.
Compile
Use LLVM-based compilation and optimized workload libraries to target the common control architecture and specialized engines.
Orchestrate
Use a planned heterogeneous task graph to dispatch work across the engines assigned to a programme.
Profile
Use simulation, debugging, and profiling tools intended to make workload behaviour inspectable.
Mission-specific compute
Four operating domains shape the programme.
Defense, space, and aerospace
Fault-tolerant processing, onboard intelligence, signal handling, and deterministic control for systems operating through constrained links or extreme conditions.
Life sciences
Molecular dynamics, computational chemistry, genomic analysis, protein research, and virtual-screening workloads.
Fintech and digital assets
Post-quantum key operations, proof workloads, secure consensus, and protected digital infrastructure.
Sovereign critical infrastructure
Purpose-specific compute intended for locally governed communications, security, artificial intelligence, and mission systems.
Research stage
Architecture first. Measured evidence next.
The current programme defines five compute directions, a shared RISC V architecture, trusted system functions, and a planned software stack. Qualified silicon and measured product performance form the next validation phase.
The next credible disclosures should identify the implemented blocks, fabrication and packaging conditions, workload and comparison baseline, measured power and performance, interface behaviour, test environment, and qualification status.